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1·Addend and the summand input, and digital and carry the output device is a half adder.

加法器是产生数的和的装置。加数和被加数为输入，和数与进位为输出的装置为半加器。

2·Addend and BeiJiaShu as input, and the device for output with binary for half a gal device.

加法器是产生数的和的装置。加数和被加数为输入，和数与进位为输出的装置为半加器。

3·Thus, the augend and the addend must each be small enough to fit within one memory location.

由此可见，加数和被加数都应足够小，以便能够合适地装入一个存储单元。

4·In Problems 2 &3 , we know the sum and one addend . So we use subtraction to get the other addend .

第（2）、（3）题是已知两个数的和与其中的一个加数，求另一个加数，用减法计算。

5·During these steps, some digits are selected for specific roles (e. g., first addend) in the addition operation, while the others are held in working memory, but not used in the current operation.

在这些心算步骤中，每个时刻只有一些数字被特殊地选择用于加法运算的被加数，而其他的数字则仅仅保存在工作记忆中并不用于当前操作。