全部

1·In terms of circuit complexity, the system of FIG.

在电路的复杂性，系统无花果。

2·This circuit provides high purity sine-wave output down to low frequencies with minimum circuit complexity.

这个电路以最简洁的结构实现了高纯净度正弦波输出，而且在较低的频率上也是如此。

3·Because of the low circuit complexity and the advantage of easy to control, high efficiency, good reliability and so on, the design chooses the way of schematic input to finish it.

选择原理图输入方法，是考虑到本电路复杂度不高，而原理图输入可控性好，效率高，可靠性强且直观，可以熟悉较底层的结构。

4·As the increase of circuit complexity, traditional simulation method has been unable to cover the total state space and the correctness of microprocessor arithmetic circuit cannot be ensured.

当电路复杂度达到一定规模后，传统的仿真验证方法已无法覆盖整个状态空间，从而无法保证像微处理器运算电路这类复杂设计的正确性。

5·An increase in chip area and circuit complexity leads to a reduction in the yield of chip production. In order to get a fair yield, the fault tolerant technique is introduced into the IC design.

随着芯片面积的增加及电路复杂性的增强，芯片的成品率逐渐下降，为了保证合理的成品率，人们将容错技术结合入了集成电路。

6·The numerical method of electrical field and circuit and nonlinear and complexity of automation are the main means utilized in the subject.

电工理论中的电路和电场计算方法以及自动控制理论中的非线性和复杂性的方法是论文的主要手段。

7·VLSI partitioning is an effective method for reducing complexity of VLSI circuit design.

电路划分是降低超大规模集成电路设计复杂性的有效方法。

8·Facing the challenge of design scale of VLSI becoming larger, except for circuit parallel, the existing basic parallel approaches cannot solve test generation complexity problems radically.

面对VLSI设计规模日益增大的挑战，除了电路并行以外，其它已有的基本并行策略都无法从根本上解决测试生成的复杂性问题。

9·An ETG circuit is one for which a complete test set (covering all modeled faults) can be generated with linear computational complexity in the circuit size.

ETG电路是这样一种电路，产生它的完全测试集的计算复杂性与电路大小成线性关系。

10·The system utilizes the high integration of CPLD, decreases the complexity of circuit.

系统充分利用CPLD的高集成度，有效地降低了整个电路的复杂程度。